A Simulator for various FTL schemes
Installation Guidelines
We have developed a simulator that simulates the behaviors of various Flash Translation Layer (FTL) schemes. The simulator aims to understand various FTL schemes and how they interact with its upper or lower layers in the I/O path (from device drivers to the flash chips). We have integrated the simulator with Disksim3.0 for this purpose. If you are familiar with using DiskSim you can easily install and run the simulator.
Download the FTL simulator
Installing Disksim3.0
Current version of the simulator has been integrated with Disksim3.0. Please make sure that Disksim3.0 is successfully installed in your host and ready to run. It won't be difficult to port their integration for DiskSim4.0.
Source files
Unzip and untar src.release.tar.gz. Then you will see ./src.release. This includes all necessary source files for flashsim. You will see some new files (that we created for our FTL simulator) besides disksim source files. Then rename src.release to src for successful compilation in Disksim. You may make a symbolic link to this directory as ./src. Makefile has been already updated accordingly and some files in ./module have also been properly updated. Just type "make" similar to normal disksim compilation.
Test files
Unzip and untar test.release.tar.gz. Please unzip and untar "test.release.tar.gz". It includes parameter files and an example script file for the test as an input of I/O trace file.
Select FTL scheme, flash size, and etc.
Open one of the parameter files. You will see the lines starting "FTL type" and "Block count" and "Extra Blokc count".(Note that I changed parameter processing codes (./src/modules/) in disksim for our own purpose.) You can change these values for your purpose. Open the README file if you need more information.
Evaluation summary
If compilation is successfully done, go to test.release directory. Type "./runtest". Then, it will run as follows and show following response time information.
5 #echo "Running Pagemap FTL..." 6 #../src/disksim pagemap.parv pagemap.outv ascii ./trace/test.file 0 7 #grep "IOdriver Response time average:" pagemap.outv 8 #grep "IOdriver Response time std.dev." pagemap.outv 9 # 10 #echo "Running DFTL..." 11 #../src/disksim dftl.parv dftl.outv ascii ./trace/test.file 0 12 #grep "IOdriver Response time average:" dftl.outv 13 #grep "IOdriver Response time std.dev." dftl.outv 14 # 15 echo "Running FAST..." 16 ../src/disksim fast.parv fast.outv ascii ./trace/test.file 0 17 grep "IOdriver Response time average:" fast.outv 18 grep "IOdriver Response time std.dev." fast.outv
As a result, you will see the following results:
Running Pagemap FTL... IOdriver Response time average: 0.429880 IOdriver Response time std.dev.: 0.802131 Running DFTL... IOdriver Response time average: 0.609340 IOdriver Response time std.dev.: 1.513767 Running FAST... IOdriver Response time average: 3.189379 IOdriver Response time std.dev.: 23.326385
Limitation and future plan
The simulator has been integrated with DiskSim3.0. It implemented four FTL schemes as of now. i) Page mapped FTL, ii) DFTL, and iii) FAST. However, this version hasn't implemented Multiple planes/Parallelism effects of real SSD. Thus our new version of the simulator has considered these concerns. Refer to: Objected Oriented Flash Simulator. Wear-leveling module is tightly coupled with GC module in each FTL scheme. Explicit wear-leveling module can be easily extendable in the codes if necessary.
Questions or comments
In case you have any doubts or questions, please write to: youkim@cse.psu.edu